Job Locations: Hyderabad
Total vacancies: 2
– B.S. or M.S. EE/CS/CE
– 5+ years working in the semiconductor industry.
– Recent FPGA experience including implementation, synthesis (Synplify), timing closure (Vivado/ISE).
– Ability to architect, implement and verify modules for FPGA interconnect.
– Proficient in Verilog, Perl, and Make
– Both simulation based verification and lab based debug skills on FPGAs.
– Experience with a source control system, such as Perforce
– Must be familiar with both Linux and Windows environments
– Hands on with lab FPGA debug methodologies, such as ChipScope, Identify or others.
– Hands on experience with lab debug equipment, such as oscilloscopes and logic analyzers
To apply for this position, please either enter your details along with the updated resume in the right hand side panel OR send your updated resume directly to firstname.lastname@example.org with current CTC, expected CTC and notice period details. Our team will contact you for further details.