Job Locations: Hyderabad
Total vacancies: 4
Strong fundamentals in physical design verification using Calibre nmDRC/nmLVS
Perform and debug DRC, LVS, Antenna, DFM, ERC and ESD checks on blocks and top-level design.
TVF basics and automation of DesignREV using TCL scripting is a must.
Understanding of custom PERC decks based on internal flow and debug.
PnR Flow knowledge is a plus, not mandatory.
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