Semi-conductor Products

MIPI UNIPRO Features

  • According MIPI v1.6 Specification
  • Multiple CPort Interface
  • RMMI Interface for MPHY with multiple symbol widths
  • UniPro Cold reset, Warm Reset and Endpoint reset.
  • UniPro Boot Sequence
  • UniPro Test Feature
  • Supports TC0(Traffic Class 0) and TC1(Traffic Class 1)
  • UniPro Hibernate Enter/Exit Procedure along with Pre Hibernate Exit
  • PHY Testing
  • UniPro Power Mode Change procedure
  • All PACP Communications
  • Supports up to 4 MPHY Lanes
  • Lane Distribution and Merging
  • Plug & Play

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MIPI UNIPRO Features According MIPI v1.6 Specification Multiple CPort Interface RMMI Interface for MPHY with multiple symbol widths UniPro Cold reset, Warm Reset and Endpoint reset. UniPro Boot Sequence UniPro Test Feature Supports TC0(Traffic Class 0) and TC1(Traffic Class 1) UniPro Hibernate Enter/Exit Procedure along with Pre Hibernate Exit PHY Testing U...

UFS Virtual Platform Features

  • Cover all the features of UFS2.0 as mentioned in JESD220 for ex. MIPI UNIPRO as an interconnect layer, All 8 LUN processing independently, Full support for SCSI command for UFS, multiple command support, etc.
  • Full register accuracy of HCI register strictly following JEDEC JESD223B
  • TLM 2.0 interface provided following 1666-2011 std
  • QEMU emulator used with ARM support which is providing real time traffic
  • AXI interface provided to easily integrate it with any verilog flash model
  • Full integrated and tested with linux based UFS device driver available is linux kernel 3.13.6

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UFS Virtual Platform Features Cover all the features of UFS2.0 as mentioned in JESD220 for ex. MIPI UNIPRO as an interconnect layer, All 8 LUN processing independently, Full support for SCSI command for UFS, multiple command support, etc. Full register accuracy of HCI register strictly following JEDEC JESD223B TLM 2.0 interface provided following 1666-2011 std QEMU emu...

 

UFS Virtual Platform Features

  • Cover all the features of UFS2.0 as mentioned in JESD220  for ex. MIPI UNIPRO as an interconnect layer, All 8 LUN processing  independently, Full support for SCSI command for UFS, multiple command support, etc.
  • Full register accuracy of HCI register strictly following JEDEC JESD223B
  • TLM 2.0 interface provided  following 1666-2011 std
  • QEMU emulator used with ARM support which is providing real time traffic
  • AXI interface provided to easily integrate it with any verilog flash model
  • Full integrated and tested with linux based UFS device driver available is linux kernel 3.13.6
  UFS Virtual Platform Features Cover all the features of UFS2.0 as mentioned in JESD220  for ex. MIPI UNIPRO as an interconnect layer, All 8 LUN processing  independently, Full support for SCSI command for UFS, multiple command support, etc. Full register accuracy of HCI register strictly following JEDEC JESD223B TLM 2.0 interface provided  following 1666-2011...

Universal Flash Storage 2.0

UFS is an advanced protocol to take advantage of SSD’s and utilize them as secondary storage while minimizing the drawbacks of flash memories. While the advantages are many, the protocol is complex and has MPHY and UniPro as the delivery systems which are involved in themselves. Incorporating a UFS device in a design will require considerable efforts especially in verifying the large number of scenarios possible. Writing these scenarios involves specialized knowledge and skills and will consume a lot of time which is not available while designing large SoC’s of which the UFS device is only one part.

UFS  Device VIP

  • Incise solution to speed up UFS verification is to write a VIP that can emulate the operation of an actual UFS device on all points of detail
  • It shall contain all the test scenarios and provide accurate protocol responses; simulate different types of errors that the user’s system will encounter in real time operation
  • Quick bug detection and correction right from protocol level to system level
  • Coverage metrics will inform user about how much of the device capabilities are utilized and tests required
  • The VIP is configurable and can be used to test systems at various stages; before/ after adding the service delivery subsystem

UFS Device Controller VIP Architecture

VIP-architecture

UFS Device Controller VIP Features

  • Comprehensive test suite for SCSI commands
  • Each UPIU provided with all system level option/feature
  • Initialization with and without boot
  • Controlled error injection through callbacks for each component
  • Real world errors such as from flash, initialization errors can be configure for testing host
  • UniPro and MPHY power modes provided
  • Flash Translation Layer provided
  • Each SAP in MPHY, UniPro and UFS provided and observable by the user
  • BFM for each component with IPXACT register model
  • WLUNs, RPMB and security features according to UFS 2.0
  • SDR,DDR and DDR2 interfaces for flash
  • All power modes present at device level and component level

UFS 2.0 Device Controller VIP Key Deliverables

  • Virtual Prototype (SystemC/TLM)
  • Detailed test Guide
  • Verification Environment
  • UVM
  • Self Testing, Direct and random test cases
  • Environment Automation Scripts
  • Reports
  • Functional Coverage
  • Code Coverage
  • Test Cases report

UFS 2.0 Virtual Platform:

UFS is an advanced protocol to take advantage of SSD’s and utilizes them as secondary storage while minimizing the drawbacks of flash memories. While the advantages are many, the protocol is complex and has MPHY and UniPro as the delivery systems which are involved in themselves. Incorporating a UFS device in a design will require considerable efforts especially in verifying the large number of scenarios possible. Writing these scenarios involves specialized knowledge and skills and will consume a lot of time which is not available while designing large SoC’s of which the UFS device is only one part.

  • Incise Infotech’s Virtual platform solution provides a complete UFS2.0 model including both host and device which is much faster simulation speed then RTL
  • The model is designed keeping in mind the full register accuracy of HCI register which can be used to demonstrate the complete UFS2.0 flow.
  • Boot up speed of the system is a lot more faster than the RTL.
  • The Model is a fully functional model of both host and device with TLM2.0 interfaces.
  • Full integrated and tested with Linux based existing driver available is Linux kernel 3.13.6 .
  • This model can be used for architectural analysis.

UFS 2.0 Virtual Platform Key Features

  • Covers all the features of UFS 2.0 like multiple command support , FLASH interface ,etc.
  • TLM 2.0 interface which could be easily integrated with any tlm2.0 based architecture.
  • QEMU emulator used with ARM support which is providing real time traffic.
  • MIPI UNIPRO as an interconnect layer.
  • All 8 LUN processing independently.
  • Full support for SCSI command for UFS.
  • AXI interface provided to easily integrate it with any Verilog flash model.

UFS 2.0 Key Deliverables

  • Fully functional Virtual model
  • QEMU with ARM support platform for integration
  • Functional specifications
  • Test cases
  • Test report
Universal Flash Storage 2.0 UFS is an advanced protocol to take advantage of SSD’s and utilize them as secondary storage while minimizing the drawbacks of flash memories. While the advantages are many, the protocol is complex and has MPHY and UniPro as the delivery systems which are involved in themselves. Incorporating a UFS device in a design will require considerable effort...