Design Expertise

We provide expert custom design resources having many years of experience in designing complex Analog circuits, memory design and standard cell libraries. The team has unique expertise to do re-characterization of memories and standard cells manually and suggest optimizations in the compiler designed memories and removing the pessimism from tool generated library timing numbers. Layout migration to lower technology nodes is our other unique offering.

Key Areas of Association:

  • Memory Characterization
  • Customized Block and full chip Layout
  • IO Design
  • Standard Cell Design
  • Physical design
  • High Speed interface
  • Porting across different nodes
  • Physical verification and GDSII Sign-off
  • Validation & Quality Assurance

Why Us?

  • Library Design, Characterization and Re- Characterization
  • Memory Layout, Design, Memory characterization and re-characterization
  • Strong expertise in chip to chip communication IP Integration & Verification


  • Layout design of Analog, Memory and Digital Cells in Lower technology Nodes
  • Circuit Design and Circuit simulations
  • Layout Migration, Technology Migration
  • Re-characterization of existing libraries, Memories and Analog Blocks
  • New design of regulators, ADC’s, DACs, SERDES etc.
  • TCL, PERL, Makefile, Automation of Timing Flows, Layout Migration


Analog Design

  • Voltage Regulators (Linear/Buck regulator)
  • HDMI Transmitter

Memory Expertise

  • Development of a Dual Port (2 Read ports, 2 write ports) SRAM
  • Development of a Low Power Single Port SRAM & ROM Memory NVM
  • Re-Characterization of Compiler generated Memories (SRAM, ROM, DPRAM)

Standard Cell Expertise

  • Design and development of complete ultra-low leakage library
  • Re-Characterization of 110nm Library to optimize speed

Tools Expertise
All Industry Standard Tools: Cadence Virtuoso, Schematic Editor, Spectre, Calibre, Xcalibre, ELDO, FINSIM, HSPICE, HSIM, NanoSim, Cadence ADE, Mentor Graphics IC Station, Star-XT


  • CDL Netlist
  • LEF File
  • .LIB Files
  • Detailed signed checklist
  • Simulation Models/ Front End Models
  • Validation Report
  • Environment Automation Scripts
  • Datasheet/ Documentation
  • Tool Database