Job Description:Design Engineer

Designing complex IPs and Verification IPs of complex protocols like Universal Flash Storage UFS 2.0, USB 3.0, EMMC-6, Ethernet , Interlaken and Bluetooth Low Energy

Engineers will be given the protocol specification and will be asked to develop the sellable IPs and Verification IPs for the clients under the guidance of Incise technical leaders, This process involves designing following items:

  • Specification Development
  • Micro-Architecture Development
  • Test Guide
  • Test Plan
  • Developing Virtual Prototype using SystemC and TLM 2.0
  • System Architecture Analysis using Virtual Models
  • Presentation
  • RTL Design using Verilog language
  • Testbench Design using System Verilog Language and UVM
  • Test case design using system Verilog at block level.
  • Coverage analysis
  • Power analysis and improvement
  • Synthesis
  • Timing analysis


Qualification: BE/B.Tech/M.Tech/M.Sc Graduate and Undergraduate in EC and CS

  • Very good knowledge of Basic Electronics and Digital Electronics
  • Good aptitude and very strong attitude to learn the VLSI
  • Basic knowledge of Unix and Perl
  • Basic knowledge of Verilog and C
  • Good knowledge of Micro-processor, State Machine