Description

I2S Controller is a highly configurable core for use in I2S compliant CODECs. It provides a simple glueless interface to industry standard audio devices. This digital audio controller core is compliant to the dominant audio standard protocol I2S. The core is optimally architected for high performance, low latency and small silicon footprint. The core is provided with the generic processor bus interface on the system side enabling the core to be used in a variety of applications including SoC applications. The core's simple and configurable architecture is independent of implementation tools and, most importantly, target technologies. I2S core is a cost effective, end-to-end solution that allows the licensees to easily migrate to FPGA,Gate array and Standard cell technologies optimally. I2S core solution leverages years of experience in creating reusable designs for Ethernet, PCI-X, SPI-4 and Hyper Transport technologies to offer lowest risk in terms of compliance and interoperability. I2S core has been tested for Amba AHB 32-bit wide interface on the system side and DMA channel support for FIFO data transfer has also been provided in this setup. I2S Controller is a highly configurable core for use in I2S compliant CODECs. It provides a simple glueless interface to industry standard audio devices. This digital audio controller core is compliant to the dominant audio standard protocol I2S. The core is optimally architected for high performance, low latency and small silicon footprint. The core is provided with the generic processor bus interface on the system side enabling the core to be used in a variety of applications including SoC applications. The core's simple and configurable architecture is independent of implementation tools and, most importantly, target technologies. I2S core is a cost effective, end-to-end solution that allows the licensees to easily migrate to FPGA,Gate array and Standard cell technologies optimally. I2S core solution leverages years of experience in creating reusable designs for Ethernet, PCI-X, SPI-4 and Hyper Transport technologies to offer lowest risk in terms of compliance and interoperability. I2S core has been tested for Amba AHB 32-bit wide interface on the system side and DMA channel support for FIFO data transfer has also been provided in this setup.